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Epitaxial growth

Multi- and Single Wafer systems

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Front end technology

Front end line for 2", 3" and 100mm

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Device design and simulation

Physical simulation, Chiplayout

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Backend

Assembly of small modules

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Devices

Device characterization

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Wafer
Packaging Process
  • Die and wire bonding
  • Module design, DCB layouts, module assembly
  • Intended to offer solutions for application related tests (e.g. transient analysis, surge mode operation)
  • Small quantities of customized modules
  • Automated pick and place tools, able to process virtual ink matrix for selecting chips into groups with special parameters
  • For larger quantities cooperation with leading packaging experts

 

Main cooperation Partners for Backend solution :

Semikron (D)

Infineon (D)

Others depending on the packaging requirements of our customers