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Device Design and Simulation

SiCED has installed the latest version of the Synopsys 3D device Simulator

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Device Characterization

End of life tests and the Investigation of the related physical phenomena will be a major topic for future work

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Wafer
1993 First SiC JFET
1995
First high quality SiO2 film on SiC (Ebr > 9MV/cm)
1997/98
Model for the trap structure in SiC MOS devices with a high density near EC (15R-MOSFET)
1999
First vertical Power MOSFET in SiC
2000
Large area Schottkydiodes (25A)
2002
Stacked high voltage switch
2003
Vertical bipolar power switch
2004
Avalanche stable large area 4.5kV pin Diodes
2005
SIT with very low Ron for solid circuit breakers
2007 High voltage 6.5kV bipolar diodes with low leakgae currents and stable avalanche